FPGA BASED BOARD DESIGN SERVICES FOR MEMORY DEVICE CHARACTERIZATION BOARD
| Location: | Maryland |
|---|---|
| Posted: | Mar 14, 2025 |
| Due: | Mar 28, 2025 |
| Agency: | COMMERCE, DEPARTMENT OF |
| Type of Government: | Federal |
| Category: |
|
| Solicitation No: | 1333ND25QNB030052 |
| Publication URL: | To access bid details, please log in. |
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- Contract Opportunity Type: Combined Synopsis/Solicitation (Original)
- Original Published Date: Mar 13, 2025 06:59 am EDT
- Original Date Offers Due: Mar 28, 2025 11:00 am EDT
- Inactive Policy: 15 days after date offers due
- Original Inactive Date: Apr 12, 2025
-
Initiative:
- None
- Original Set Aside: Total Small Business Set-Aside (FAR 19.5)
- Product Service Code: DA01 - IT AND TELECOM - BUSINESS APPLICATION/APPLICATION DEVELOPMENT SUPPORT SERVICES (LABOR)
-
NAICS Code:
- 541512 - Computer Systems Design Services
-
Place of Performance:
Gaithersburg , MD 20899USA
PLEASE SEE ATTACHMENTS FOR COMPLETE NOTICE DETAILS...
- ACQUISITION MANAGEMENT DIVISION 100 BUREAU DR.
- GAITHERSBURG , MD 20899
- USA
- Joni L. Laster
- joni.laster@nist.gov
- Phone Number 3019756205
- Forest Crumpler
- forest.crumpler@nist.gov
- Mar 13, 2025 06:59 am EDTCombined Synopsis/Solicitation (Original)
Related Document
| Mar 19, 2025 | [Combined Synopsis/Solicitation (Updated)] FPGA BASED BOARD DESIGN SERVICES FOR MEMORY DEVICE CHARACTERIZATION BOARD |
| Mar 24, 2025 | [Combined Synopsis/Solicitation (Updated)] FPGA BASED BOARD DESIGN SERVICES FOR MEMORY DEVICE CHARACTERIZATION BOARD |
| Mar 25, 2025 | [Combined Synopsis/Solicitation (Updated)] FPGA BASED BOARD DESIGN SERVICES FOR MEMORY DEVICE CHARACTERIZATION BOARD |
| Apr 1, 2025 | [Combined Synopsis/Solicitation (Updated)] FPGA BASED BOARD DESIGN SERVICES FOR MEMORY DEVICE CHARACTERIZATION BOARD |
| Apr 3, 2025 | [Combined Synopsis/Solicitation (Updated)] FPGA BASED BOARD DESIGN SERVICES FOR MEMORY DEVICE CHARACTERIZATION BOARD |
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