CHIPS High-Throughput High-Resolution X-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates

Location: Maryland
Posted: Feb 24, 2026
Due: Mar 9, 2026
Agency: COMMERCE, DEPARTMENT OF
Type of Government: Federal
Category:
  • 66 - Instruments and Laboratory Equipment
Solicitation No: 1333ND26QNB030031
Publication URL: To access bid details, please log in.
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CHIPS High-Throughput High-Resolution X-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates
Active
Contract Opportunity
Notice ID
1333ND26QNB030031
Related Notice
NIST-SS26-CHIPS-14
Department/Ind. Agency
COMMERCE, DEPARTMENT OF
Sub-tier
NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY
Office
DEPT OF COMMERCE NIST
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General Information View Changes
  • Contract Opportunity Type: Combined Synopsis/Solicitation (Updated)
  • Updated Published Date: Feb 24, 2026 03:07 pm EST
  • Original Published Date: Feb 12, 2026 11:42 am EST
  • Updated Date Offers Due: Mar 09, 2026 11:00 am EDT
  • Original Date Offers Due: Feb 26, 2026 11:00 am EST
  • Inactive Policy: 15 days after date offers due
  • Updated Inactive Date: Mar 24, 2026
  • Original Inactive Date: Mar 13, 2026
  • Initiative:
    • None
Classification
  • Original Set Aside:
  • Product Service Code: 6640 - LABORATORY EQUIPMENT AND SUPPLIES
  • NAICS Code:
    • 334413 - Semiconductor and Related Device Manufacturing
  • Place of Performance:
    Gaithersburg , MD 20899
    USA
Description View Changes

Amendment 0001:



Amendment changes include the following:




  1. The required response date is extended from February 26, 2026 to March 9, 2026

  2. No Statement of work change

  3. Questions and Answers:



Question1: Is there a cleanroom specification?



NIST Response: No. The instrument will be installed in a general purpose lab in the advanced measurement laboratory facility, but not within a cleanroom.





Question 2: Are you flexible on the footprint (size/dimension)



NIST Response: NIST expects the analytical instrument (source, stages, detectors, and shielded enclosure) to fit within the footprint specified by 10.2. Additional space is available in the lab around the instrument for service access, and for support equipment (including chase space for air compressor/dryer if required, and a work area in the lab for control and analysis PCs).





Question 3: Are the devices in JEDEC Trays?



NIST Response: Typically no. NIST requires significant flexibility to load samples that are within the size envelope described by specification 5. Samples will include full wafers, coupons (partial wafers), individual or groups of packaged devices, as well as atypical sample geometries. To meet requirement 5.1, vendors must include 5 sample carriers that are compatible with the automated loading system. Carriers supporting a JEDEC tray is only one possible way to meet that requirement.





See Combined Synopsis Solicitation_1333ND26QNB030031, Attachment 1 - Statement of Work, and Attachment 2 - Applicable Provisions and Clauses attachments for solicitation details.


Attachments/Links
Contact Information
Contracting Office Address
  • ACQUISITION MANAGEMENT DIVISION 100 BUREAU DR.
  • GAITHERSBURG , MD 20899
  • USA
Primary Point of Contact
Secondary Point of Contact
History

Related Document

Feb 12, 2026[Combined Synopsis/Solicitation (Original)] CHIPS High-Throughput High-Resolution X-ray Laminography/Tomography System for Advanced Packaged Semiconductor Devices and Substrates
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